1. Field of the Disclosure
This disclosure relates to electronic devices and processes, and more particularly, to electronic devices including gate electrodes having portions with different conductivity types and processes of forming them.
2. Description of the Related Art
A nonvolatile memory cell can include a mirror bit memory cell. The mirror bit memory cell typically includes a silicon nitride layer that traps charges. During programming hot electrons can be injected into the silicon nitride layer, and during erasing, hot holes can be injected into the silicon nitride layer to get the net charge closer to zero. After many programming and erasing cycles, the electron and hole distributions can become miss-matched. Electrons trapped in the nitride tend to spread laterally in the channel direction, while the holes remain closer to the source/drain overlap region. The resulting miss-match between electron and hole distributions produces a dipole field. Excess trapped holes propelled by the dipole field move towards the channel region where, over time, they neutralize trapped electrons resulting in charge loss. This occurrence limits the reliability of the mirror-bit memory cell.
Skilled artisans appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help improve understanding of embodiments of the invention.